Making own ISR in S7G2

Hello,

Anyone worked with making own ISR or callback functions in S7G2 . I figure out callback functions are registered in bsp_group_irq but not sure how it works or maybe anyone have some reference for it.

Thanks

 

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  • This reply was deleted.
  • Here is an example on how to write a user defined ISR in SSP 1.x.x. For version 1.2.0 and later read replies further down in this post...

    The example enables the GPT0 Capture Compare A Interrupt

    I've used a similar process for additional ADC interrupts, so I think what is written below is correct!

    BR, Richard

    Enable the interrupt in the ICU tab of the Synergy Configurator.

     

    Generate & Build the project.

     

    If you were to run the project, as part of SystemInit (), there is a function call to bsp_irq_cfg ();

     

    void SystemInit (void)

    /* Initialize ELC events that will be used to trigger NVIC interrupts. */

    bsp_irq_cfg();

     

    This populates the Interrupt Enable Select Registers in the ICU.

    This can be seen the IO Register ICU -> IELSR debug view

     

    We now have to write the ISR.

    In the source file, for example hal_entry.c, write the following:

    To enable the interrupt, the interrupt has to be enable in the NVIC.

    In source file, for example hal_entry.c, write the following:

     

    In the ISR it will most likely to clear the interrupt flags that have been set in the IELSR and potentially, the peripheral.

     

    In this example of the GPT, the code would be:

  • Thanks alot Richard Warner i will try and let you know if having some problems

  • Hi
    Newbie here. I am using Synergy with SK-S7G2. I have SSC configured with IAR Workbench. In SSC, my ICU Tab shows nadda!? I cannot see any of the #define's you show above...

    My ..\synergy_cfg\ssp_cfg\bsp\bsp_irg_cfg.h is empty? What am I doing wrong?

    Thanks

    Bill
  • Hi Bill,

    In SSP 1.2.0 the ICU tab will be empty. This is expected since all interrupts are configured in respective drivers. To enable an interrupt, go to driver's configuration settings and set the priority of the interrupt to an enabled level.

    Regards,
    adboc
  • Hi Bill,
    Yes, the method mentioned previously was for SSP1.1.3.
    SSP1.2 has a more efficient way of creating the vector table.
    I will try and find an example and post.
  • Hello Bill,

    As adboc mentioned, in SSP 1.2.0 vectors are inserted into the vector table by driver instances, rather than using pre-defined vector table rigged with ifdef's. Interrupts are enabled by "open" function of the driver, using the info from FMI.

    Here are two steps required to specify your own ISR for peripheral signal (I'm using JPEG JDTI interrupt):

    To add definition to the vector table and link the interrupt with your ISR function:

    SSP_VECTOR_DEFINE(jpeg_jdti_isr, JPEG, JDTI);

    peripherals with multiple channels (GPT) or units (ADC) should use one of the following:

    SSP_VECTOR_DEFINE_CHAN(isr,ip,signal,channel);
    SSP_VECTOR_DEFINE_UNIT(isr,ip,unit_name,signal,channel);

    To enable the interrupt (set priority to 8):

    ssp_feature_t ssp_feature = {{(ssp_ip_t) 0}};
    ssp_feature.channel = 0;
    ssp_feature.unit = 0U;
    ssp_feature.id = SSP_IP_JPEG;

    fmi_event_info_t event_info = {(IRQn_Type) 0U};
    g_fmi_on_fmi.eventInfoGet(&ssp_feature, SSP_SIGNAL_JPEG_JDTI, &event_info);
    NVIC_SetPriority(event_info.irq, 8);

    R_BSP_IrqStatusClear(event_info.irq);
    NVIC_ClearPendingIRQ(event_info.irq);
    NVIC_EnableIRQ(event_info.irq);

    (you may also have to enable the interrupt in the registers for that peripheral)

    And to disable it (i.e. closing the driver) you should do the same, but omit call to NVIC_SetPriority and replace NVIC_EnableIRQ with NVIC_DisableIRQ.

    Inside the ISR function, use R_BSP_IrqStatusClear(R_SSP_CurrentIrqGet()); to clear the flag in the ICU (you may have to clear one in the peripheral also).

    Regards

  • UserDefineISR.zip

    Here is an example written for the SK-S7G2 for E2 studio

    It uses 3 GPT timers : 0,1 & 2.   

    The example shows how to create a compare match interrupt for GPT0A, GPT1B and GPT2C

    GPT0A isr turns on LED1, GPT1B isr turns on LED2 & GPT2C turns on LED3.

    The GPT0 ISR that is set via the Synergy Configuration tool turns off the LEDs

    Hopefully the comments in the code, in addition to the previous posts on this thread, will get you going

    BR, Richard

  • NOTE:
    I just noticed that my user defined ISRs were missing clearing the ISR status flag in the GPT peripheral.
    They should be like this.


    void gpt0_counter_compare_match_A_isr(void)
    {
    ssp_vector_info_t * p_vector_info = NULL;
    R_SSP_VectorInfoGet(R_SSP_CurrentIrqGet(), &p_vector_info);

    g_ioport.p_api->pinWrite(IOPORT_PORT_06_PIN_00, IOPORT_LEVEL_LOW);

    R_GPTA0->GTST_b.TCFA = 0; // Clear the ISR flag in the peripheral

    /** Clear pending IRQ to make sure it doesn't fire again after exiting */
    R_BSP_IrqStatusClear(R_SSP_CurrentIrqGet());
    }


    void gpt1_counter_compare_match_B_isr(void)
    {
    ssp_vector_info_t * p_vector_info = NULL;
    R_SSP_VectorInfoGet(R_SSP_CurrentIrqGet(), &p_vector_info);

    g_ioport.p_api->pinWrite(IOPORT_PORT_06_PIN_01, IOPORT_LEVEL_LOW);

    R_GPTA1->GTST_b.TCFB = 0; // Clear the ISR flag in the peripheral

    /** Clear pending IRQ to make sure it doesn't fire again after exiting */
    R_BSP_IrqStatusClear(R_SSP_CurrentIrqGet());
    }


    void gpt2_counter_compare_match_C_isr(void)
    {
    ssp_vector_info_t * p_vector_info = NULL;
    R_SSP_VectorInfoGet(R_SSP_CurrentIrqGet(), &p_vector_info);

    g_ioport.p_api->pinWrite(IOPORT_PORT_06_PIN_02, IOPORT_LEVEL_LOW);

    R_GPTA2->GTST_b.TCFC = 0; // Clear the ISR flag in the peripheral

    /** Clear pending IRQ to make sure it doesn't fire again after exiting */
    R_BSP_IrqStatusClear(R_SSP_CurrentIrqGet());
    }
  • Hi Bill!

    Welcome to RenesasRulz, I hope that the forum members are able to help you with any questions you may have as you're working with the SK-S7G2. Just to keep things a bit cleaner and easier to find / respond to, in the future, I would recommend starting a new thread if you have a new question. That will hopefully make the question easier to find if someone else has a question similar to yours.

    Thanks!

    -Josh
    RenesasRulz Forum Moderator
  • Josh, Richard, Karol, adboc

    Extremely helpful. Richard...I leveraged your example code and worked as I intended in short order .

    Is there documentation anywhere that describes this pattern for ISR setup and handling?

    Thanks again!!

    Bill
  • Hello Richard!

    Could you please give me a info where to find the label for a specific NVIC. Currently I'm trying to write my own ISR for a GPT on a S124 and I'm looking for a definition table for the interrupt sources.

    Following functions need the right names, and I don't have them:

     

    // Sets interrupt priority and initializes vector info

    NVIC_SetPriority(*p_irq, ipl);

    //Clear the ISR status

    R_BSP_IrqStatusClear(event_info.irq);

    //Clear pending ISR

    NVIC_ClearPendingIRQ(event_info.irq);

    //Interrupt has to be enable in the NVIC.

    NVIC_EnableIRQ(...);

     

    Do you know where to find them?

    Regards,

    Gregor

Reply
  • Hello Richard!

    Could you please give me a info where to find the label for a specific NVIC. Currently I'm trying to write my own ISR for a GPT on a S124 and I'm looking for a definition table for the interrupt sources.

    Following functions need the right names, and I don't have them:

     

    // Sets interrupt priority and initializes vector info

    NVIC_SetPriority(*p_irq, ipl);

    //Clear the ISR status

    R_BSP_IrqStatusClear(event_info.irq);

    //Clear pending ISR

    NVIC_ClearPendingIRQ(event_info.irq);

    //Interrupt has to be enable in the NVIC.

    NVIC_EnableIRQ(...);

     

    Do you know where to find them?

    Regards,

    Gregor

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