FileX/LevelX on S7G2 data flash

Has anyone used FileX on the S7G2 internal data flash?


Matt Farley

  • I haven't used it on Synergy parts but on other Cortex M parts there are usually restrictions on writing to internal flash while it's being used for code. For example, on an NXP part, you can't write to flash and read/execute in the same "bank" (0-1M is a bank, and 1M-2M is another bank). There are also restrictions on system clock speed when writing - on NXP, a part that runs at 180Mhz can write to flash unless the clock is <120Mhz, necessitating a change in CPU clocks "on the fly" or booting in a bootloader w/ a slower clock.

    I checked the Synergy manual. For the parts with smaller flashes, your're limited to writing to the "data flash" memory only. For larger parts, like 2M, it operated like I mentioned above. You'd have to run any flashing code from SRAM while the programmings is done to overcome this.

    The "Data Flash" areas are small - 8K - not really suitable for FileX. I'm guessing the restrictions above on use of flash while running it in might not allows FileX to run easily. You'd be better off with a QSPI part - cheap and you need will run on it.
  • In reply to larry_c_not_Renesas:

    Yes, the code flash has a number of restrictions on writing while executing and fairly large erase block sizes. I'm specifically interested in the 64k data flash and not reinventing wear leveling.

  • Not sure you have enough to wear level with a 64K. And I don't think FileX would really work on 64K.
  • In reply to larry_c_not_Renesas:

    Hi Matthew-
    Internal Data Flash is structured for more often writes. Do you know how many writes you are expecting?
  • In reply to WarrenM:

    Something on the order of a million. It is an industrial controller with a fairly long lifetime that records a number of parameters in a rolling buffer. There are other ways to handle this, but I would rather spend time on all the other features that need to get done without reinventing a wear leveling file system.