CAN initialized error occurred while CAN and SCI driver initialized in the same thread in S124DK

hi,

as title.

I refer "an-r11an0065eu0101-synergy-can-hal-mod-guide", and "r11an0085eu0101-synergy-sci-uart-hal-mod-guide".

CAN or SCI function works independently,

but when I new a thread then add CAN and SCI in the stack,

then initialize SCI and CAN in "thread_entry.c".

compiling is work, but "err = g_can0.p_api->open(g_can0.p_ctrl, g_can0.p_cfg);" always return error code 60002.

Am I miss any setting?

  • What version of the SSP?
    Which SCI channel and on which I/O pins?
    Which I/O pins are you using for the CAN?
  • In reply to Richard:

    hi,
    SSP version is 1.5.0
    SCI0 on P410, P411
    CAN0 on P109, P110
  • In reply to HJY:

    Thanks!
    OK. I too had this issue which was due to the clock configuration and bit timing setting of the CAN peripheral.
    The CAN peripheral requires 2 clocks to operate - the ICLK running from the external crystal ( which on the S124_DK is 16MHz) and the internal peripheral clock PCLKB. There is the restriction that there must be a 2:1 ratio between ICLK and PCLKB. Therefore, make sure in the clock config you are using the Clock Src : XTAL, ICLK Div / 1 (= 16MHz) and PCLKB Div / 2 (=8MHz)
    There is a further restriction that PCLKB >= Crystal frequency / Baud Rate Prescaler set in the configuration. This means that the Baud Rate Prescaler can be a minimum of 2
    Therefore, with the 16MHz XTAL, adjusting the CAN timing settings, the best achievable bit rate is 500k
    (Baud Rate Prescaler = 2, Time Segment 1= 5Tq, Time Segment 2 = 2Tq, SJW = 1Tq)

    Is this the issue that you are having too?

    Regards,
    Richard
  • In reply to Richard:

    Sorry,
    I have just realized that I have made a mistake myself, not helped by the terminology in the Hardware User's Manual and what appears to be an incorrect line of code in the CAN driver clock init.
    I will check and post again when I'm 100% sure
    Regards,
    Richard
  • In reply to Richard:

    OK,
    Very bad terminology in the Hardware User's Manual. They use the term fCANCLK and fCANMCLK (which is also fCAN).  Very easy to get them mixed up, as I did.

    Section 27.9.2 of the Hardware User's Manual states:

    The following clock constraints must be satisfied for the CAN module:
    1) fPCLKB >= fCANMCLK
    2) The clock frequency ratio of ICLK and PCLKB must be 2:1 when using the CAN module. Operation is not guaranteed for other settings.

    Figure 27.1 CAN module block diagram does show that fCANMCLK is the clock BEFORE the Baud Rate Prescaler (EXTAL of the S124) and fCANCLK is the output frequency after the Baud Rate Prescaler.

     

    Therfore, fPCLKB >= fCANMCLK == PCLKB >= EXTAL of the S124

     

    On the S124 EXTAL = 16MHz.  

    Therefore, to meet the condition of PCLKB >= EXTAL, the only option on a default S124_DK is to set the System clock to be the HOCO, 32MHz.

    Set ICLK / DIV1 (= 32MHz)

    Set PCLKB / DIV2 (= 16MHz)

     

    NOTE: That by setting the system clock to be the HOCO, the BSP will not enable the XTAL main clock circuit, which is required for the CAN module.

    You will have to add the CGC API call to start the XTAL otherwise CAN open will return with SSP_ERR_CLOCK_INACTIVE

     

    eg:

       

        g_cgc.p_api->clockStart(CGC_CLOCK_MAIN_OSC, NULL);

        ssp_err = g_can0.p_api->open(g_can0.p_ctrl, g_can0.p_cfg);
        if(SSP_SUCCESS != ssp_err)
        {
            __BKPT(1);
        }

     

    Sorry for any confusion on my behalf

    Regards

    Richard

  • In reply to Richard:

    To complicate things further, the function can_open_parameters_check_clock() that is called in the function R_CAN_Open(), checks the frequency of PCLKB >= CANCLK not PCLKB >= CANMCLK (the comment is misleading) :-

    /** If the devices is configured for CANMCLK or can only use CANMCLK */
    if (can_feature.mclock_only || (CAN_CLOCK_SOURCE_CANMCLK == extended_cfg->clock_source))
    {
    /** Verify pclkb is greater than or equal to canmclk */
    CAN_ERROR_RETURN(pclkb_frequency >= (BSP_CFG_XTAL_HZ/(p_cfg->p_bit_timing->baud_rate_prescaler)), SSP_ERR_CAN_INIT_FAILED);
    }

    The code should actually be :-

    /** If the devices is configured for CANMCLK or can only use CANMCLK */
    if (can_feature.mclock_only || (CAN_CLOCK_SOURCE_CANMCLK == extended_cfg->clock_source))
    {
    /** Verify pclkb is greater than or equal to canmclk */
    CAN_ERROR_RETURN(pclkb_frequency >= (BSP_CFG_XTAL_HZ), SSP_ERR_CAN_INIT_FAILED);
    }

    This means the R_CAN_Open() function will pass with clock settings that are incorrect.
    Use the clock setting that Richard detailed in his last post.