Enabling 128 MB External RAM in RSK based custom board

We are developing a rsk based custom board with 128 MB ram. Currently 32 byte is enabled using same configuration used in the RSK board. What are the changes required to enable 128 MB of RAM.

Currently i have changed following things but getting no result.

In dts file changed

    //memory@8000000 {
    //    device_type = "memory";
    //    reg = <0x08000000 0x02000000>;

 

to

 

    memory@8000000 {
        device_type = "memory";
        reg = <0x08000000 0x08000000>;

 

Please give some solution for  enabling the 128 MB ram

  • What you have is correct.

    You can look at the Renesas GENMAI board that had also 128MB of SDRAM.
    github.com/.../r7s72100-genmai.dts

    Of course, you first need to make sure all your SDRAM and pin setup is correct in u-boot.

    NOTE: The u-boot commands (like "run s_boot" ) will override the memory settings in the device tree, so you should modify you u-boot code so it does not do that, or change the value to 128MB (also like GENAMI board)

    github.com/.../genmai.c

    #define MEM_ADDR_SDRAM "0x08000000 0x08000000" /* System Memory for when using external SDRAM RAM (128MB) */
  • In reply to Chris:

    edited u-boot and dtb as per the genmai board.

    and while booting getting following log

    Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    Memory: 129332K/131072K available (3165K kernel code, 174K rwdata, 1396K rodata, 134K init, 243K bss, 1740K reserved, 0K cma-reserved)



    But after getting some error

    cpufreq-dt: probe of cpufreq-dt failed with error -2
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group sdhi0 with 8 pins
    random: fast init done
    usb 2-1: new high-speed USB device number 2 using r8a66597_hcd
    sh_mobile_sdhi e804e000.sd: mmc0 base at 0xe804e000 max clock rate 64 MHz
    ------------[ cut here ]------------


    and booting stuck here.
  • In reply to jomon:

    Stuck where?
    You mean there is nothing after the sh_mobile_sdhi message?
  • In reply to Chris:

    Yes nothing getting after sh_mobile_sdhi message
  • In reply to jomon:

    No idea about that then. loading that driver won't do anything.
    Maybe you can copy your entire boot log to a file and post it (drag it into the reply window).

    I wonder if you need to enable "earlyprintk" on the kernel command line in order to see all the messages.

    Also, you can enable "initcall_debug" on the kernel command line and get lots more information
  • In reply to Chris:

    I am adding the complete logs in below.

     

    Is there any relation with current error and sdhi 0? because i already changed sdhi1 to sdhi 0. 

    I changed following things  in  the uboot for enabling the 128 MB ram.

    under int board_early_init_f(void) function

    added pfc_set_pin_function(7, 1, ALT1, 0, 0); /* P7_1 = CS3 */

    and commneted led 0

    /* LED 0 */
        //pfc_set_gpio(7, 1, GPIO_OUT); /* P7_1 = GPIO_OUT */

     

    //#define CS3WCR_D    2 << 13    |
    #define CS3WCR_D    1 << 13    |

    //#define SDCR_D        0x00110811    /* 13-bit row, 9-bit col, auto-refresh */
    #define SDCR_D    0x00120812    /* 13-bit row, 10-bit col, auto-refresh */

    //#define RTCOR_D        0xA55A0080    /* Refresh Counter = 128 */
    //#define RTCSR_D        0xA55A0008    /* Clock Source=CKIO/4 (CKIO=66MHz) */

    #define RTCOR_D    0xA55A0020    /* Refresh Counter = 32 */
    #define RTCSR_D    0xA55A0010    /* Clock Source=CKIO/16 (CKIO=66MHz) */

    and in the board_late init function  

    //#define MEM_ADDR_SDRAM        "0x08000000 0x02000000"

    1) for below 64 MB RAM

          #define MEM_ADDR_SDRAM        "0x08000000 0x3B20B80" in this scenario it is working with 60544K RAM

    2) for 128 MB RAM

         #define MEM_ADDR_SDRAM        "0x08000000 0x08000000"   but getting current error

     

    And in the device tree changed

    //memory@8000000 {
        //    device_type = "memory";
        //    reg = <0x08000000 0x02000000>;
        //};

        memory@8000000 {
            device_type = "memory";
            reg = <0x08000000 0x08000000>;
        };

  • In reply to jomon:

    The booting log with 128 MB RAM is added in below

    U-Boot 2017.05-g0e3cb57-dirty (Oct 02 2018 - 21:34:45 +0530)

    CPU: Renesas Electronics CPU rev 0.0
    Board: RSKRZA1
    I2C: ready
    DRAM: 10 MiB
    MMC: sh-sdhi: 0
    SF: Detected s25fl512s_256k with page size 512 Bytes, erase size 256 KiB, total 64 MiB
    In: serial_sh
    Out: serial_sh
    Err: serial_sh
    SPI Flash Memory Map
    ------------------------------------
    Start Size SPI
    u-boot: 0x00000000 0x080000 0
    env: 0x00080000 0x040000 0
    DT: 0x000C0000 0x040000 0
    Kernel: 0x00100000 0x280000 0+1 (size*=2)
    rootfs: 0x00400000 0x1C00000 0+1 (size*=2)
    Net: sh_eth
    Hit any key to stop autoboot: 0
    SF: Detected s25fl512s_256k with page size 512 Bytes, erase size 256 KiB, total 64 MiB
    device 0 offset 0xc0000, size 0x8000
    SF: 32768 bytes @ 0xc0000 Read: OK
    Current Mode: Read Mode (3-byte Addr) (RZ/A1 reset value)
    SF: Dual SPI mode
    SF: Detected s25fl512s_256k with page size 512 Bytes, erase size 256 KiB, total 64 MiB
    New Mode: Quad I/O Read Mode (4-byte Addr)
    Booting Linux...
    Booting Linux on physical CPU 0x0
    Linux version 4.9.76-g1cf6236 (jomon@jomon-B85M-DS3H-A) (gcc version 6.4.1 20170707 (Linaro GCC 6.4-2017.08) ) #10 Thu May 31 15:16:03 IST 2018
    CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=58c53c7d
    CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
    OF: fdt:Machine model: RSKRZA1
    debug: ignoring loglevel setting.
    bootconsole [earlycon0] enabled
    Memory policy: Data cache writeback
    On node 0 totalpages: 32768
    free_area_init_node: node 0, pgdat c003adb4, node_mem_map c7ef9000
    Normal zone: 256 pages used for memmap
    Normal zone: 0 pages reserved
    Normal zone: 32768 pages, LIFO batch:7
    CPU: All CPU(s) started in SVC mode.
    pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
    pcpu-alloc: [0] 0
    Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
    Kernel command line: ignore_loglevel earlyprintk earlycon=scif,0xE8008000 root=/dev/mmcblk0p1 rootwait
    PID hash table entries: 512 (order: -1, 2048 bytes)
    Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    Memory: 129368K/131072K available (2595K kernel code, 157K rwdata, 1172K rodata, 127K init, 228K bss, 1704K reserved, 0K cma-reserved)
    Virtual kernel memory layout:
    vector : 0xffff0000 - 0xffff1000 ( 4 kB)
    fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
    vmalloc : 0xc8800000 - 0xff800000 ( 880 MB)
    lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
    modules : 0xbf800000 - 0xc0000000 ( 8 MB)
    .text : 0xbf800000 - 0xbfbae0a4 (3769 kB)
    .init : 0xc000a000 - 0xc0016000 ( 48 kB)
    .data : 0xc0008000 - 0xc003b5c0 ( 206 kB)
    .bss : 0xc003b5c0 - 0xc0074908 ( 229 kB)
    NR_IRQS:16 nr_irqs:16 16
    L2C-310 dynamic clock gating enabled, standby mode enabled
    L2C-310 cache controller enabled, 8 ways, 128 kB
    L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x06020000
    clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 59726888946 ns
    sched_clock: 32 bits at 32MHz, resolution 31ns, wraps every 67108863984ns
    ostm: used for clocksource
    ostm: used for clock events
    Console: colour dummy device 80x30
    console [tty0] enabled
    bootconsole [earlycon0] disabled
    �Booting Linux on physical CPU 0x0
    Linux version 4.9.76-g1cf6236 (jomon@jomon-B85M-DS3H-A) (gcc version 6.4.1 20170707 (Linaro GCC 6.4-2017.08) ) #10 Thu May 31 15:16:03 IST 2018
    CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=58c53c7d
    CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
    OF: fdt:Machine model: RSKRZA1
    debug: ignoring loglevel setting.
    bootconsole [earlycon0] enabled
    Memory policy: Data cache writeback
    On node 0 totalpages: 32768
    free_area_init_node: node 0, pgdat c003adb4, node_mem_map c7ef9000
    Normal zone: 256 pages used for memmap
    Normal zone: 0 pages reserved
    Normal zone: 32768 pages, LIFO batch:7
    CPU: All CPU(s) started in SVC mode.
    pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
    pcpu-alloc: [0] 0
    Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
    Kernel command line: ignore_loglevel earlyprintk earlycon=scif,0xE8008000 root=/dev/mmcblk0p1 rootwait
    PID hash table entries: 512 (order: -1, 2048 bytes)
    Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    Memory: 129368K/131072K available (2595K kernel code, 157K rwdata, 1172K rodata, 127K init, 228K bss, 1704K reserved, 0K cma-reserved)
    Virtual kernel memory layout:
    vector : 0xffff0000 - 0xffff1000 ( 4 kB)
    fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
    vmalloc : 0xc8800000 - 0xff800000 ( 880 MB)
    lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
    modules : 0xbf800000 - 0xc0000000 ( 8 MB)
    .text : 0xbf800000 - 0xbfbae0a4 (3769 kB)
    .init : 0xc000a000 - 0xc0016000 ( 48 kB)
    .data : 0xc0008000 - 0xc003b5c0 ( 206 kB)
    .bss : 0xc003b5c0 - 0xc0074908 ( 229 kB)
    NR_IRQS:16 nr_irqs:16 16
    L2C-310 dynamic clock gating enabled, standby mode enabled
    L2C-310 cache controller enabled, 8 ways, 128 kB
    L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x06020000
    clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 59726888946 ns
    sched_clock: 32 bits at 32MHz, resolution 31ns, wraps every 67108863984ns
    ostm: used for clocksource
    ostm: used for clock events
    Console: colour dummy device 80x30
    console [tty0] enabled
    bootconsole [earlycon0] disabled
    Calibrating delay loop (skipped) preset value.. 800.00 BogoMIPS (lpj=4000000)
    pid_max: default: 32768 minimum: 301
    Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
    Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
    CPU: Testing write buffer coherency: ok
    Setting up static identity map for 0x7800200 - 0x780024c
    devtmpfs: initialized
    VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
    clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
    futex hash table entries: 256 (order: -1, 3072 bytes)
    pinctrl core: initialized pinctrl subsystem
    Detected Renesas RZ/A r7s72100
    NET: Registered protocol family 16
    DMA: preallocated 256 KiB pool for atomic coherent allocations
    No ATAGs?
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-0 with 6 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-1 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-2 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-3 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-4 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-5 with 11 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-6 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-7 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-8 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-9 with 8 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-10 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-11 with 16 pins
    pinctrl-rza1 fcfe3000.pin-controller: Registered 12 gpio controllers
    pinctrl-rza1 fcfe3000.pin-controller: RZ/A1 pin controller and gpio successfully registered
    SCSI subsystem initialized
    usbcore: registered new interface driver usbfs
    usbcore: registered new interface driver hub
    usbcore: registered new device driver usb
    sh_mtu2 fcff0000.timer: ch0: used for clock events
    clocksource: Switched to clocksource ostm
    NET: Registered protocol family 2
    TCP established hash table entries: 1024 (order: 0, 4096 bytes)
    TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
    TCP: Hash tables configured (established 1024 bind 1024)
    UDP hash table entries: 256 (order: 0, 4096 bytes)
    UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
    NET: Registered protocol family 1
    workingset: timestamp_bits=30 max_order=15 bucket_order=0
    squashfs: version 4.0 (2009/01/31) Phillip Lougher
    jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
    Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
    io scheduler noop registered
    io scheduler deadline registered
    io scheduler cfq registered (default)
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group vdc50 with 28 pins
    vdc5fb fcff7400.display: fcff7400.display: [gwp0700cnwv04] dotclock 32.000 MHz, dcdr 2
    vdc5fb: Layer 2 Enabled (800x480 @ 0x60000000)
    Console: switching to colour frame buffer device 100x30
    graphics fb0: registered fcff7400.display as 800x480 @ 57 Hz, 32 bpp.
    Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
    SuperH (H)SCI(F) driver initialized
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group serial2 with 2 pins
    e8008000.serial: ttySC0 at MMIO 0xe8008000 (irq = 19, base_baud = 0) is a scif
    console [ttySC0] enabled
    1 ofpart partitions found on MTD device 18000000.qspi
    Creating 1 MTD partitions on "18000000.qspi":
    0x000000800000-0x000001000000 : "user"
    libphy: Fixed MDIO Bus: probed
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group ether with 18 pins
    libphy: sh_mii: probed
    sh-eth e8203000.ethernet eth0: Base address at 0xe8203000, 32:33:34:35:ff:ff, IRQ 58.
    r8a66597_hcd r8a66597_hcd.0: USB Host Controller
    r8a66597_hcd r8a66597_hcd.0: new USB bus registered, assigned bus number 1
    r8a66597_hcd r8a66597_hcd.0: irq 65, io base 0xe8010000
    hub 1-0:1.0: USB hub found
    hub 1-0:1.0: 1 port detected
    r8a66597_hcd r8a66597_hcd.1: USB Host Controller
    r8a66597_hcd r8a66597_hcd.1: new USB bus registered, assigned bus number 2
    r8a66597_hcd r8a66597_hcd.1: irq 66, io base 0xe8207000
    hub 2-0:1.0: USB hub found
    hub 2-0:1.0: 1 port detected
    usbcore: registered new interface driver usb-storage
    udc-core: couldn't find an available UDC - added [g_ether] to list of pending drivers
    rtc rtc0: invalid alarm value: 1970-1-1 255:255:255
    sh-rtc fcff1000.rtc: rtc core: registered sh as rtc0
    i2c /dev entries driver
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group i2c0 with 2 pins
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group irq1 with 1 pins
    ft5x06-ts 0-0038: ft5x06_init_panel: could not detect ft5x06
    ft5x06-ts 0-0038: could not init touch panel
    ft5x06-ts: probe of 0-0038 failed with error -5
    i2c-riic fcfee000.i2c: registered with 400000Hz bus speed
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group i2c3 with 2 pins
    i2c-riic fcfeec00.i2c: registered with 100000Hz bus speed
    cpu cpu0: failed to get clock: -2
    cpufreq-dt: probe of cpufreq-dt failed with error -2
    pinctrl-rza1 fcfe3000.pin-controller: Parsed function and group sdhi0 with 8 pins
    sh_mobile_sdhi e804e000.sd: mmc0 base at 0xe804e000 max clock rate 64 MHz
    ------------[ cut here ]------------
  • In reply to jomon:

    If it crashes when loading the SD card driver, then this issue is probably the pin muxing. You said you moved from a 16-bit SDRAM interface to 32-bit SDRAM interface. Maybe some of the SDHI c0 pins are the same as the SDRAM, so as soon as the SDHI driver is loaded, the SDRAM interface crashes.
  • In reply to jomon:

    jomon,

    Have you experienced success with your project?

    Mike Clements
    RenesasRulz Moderator
  • In reply to Mike Clements:

    Yes, successfully enabled 128 MB RAM. Thanks for the support.