PC, PSW pushed to Interrupt Stack or User Stack?

I read a few documents and was trying to understand what happens to PC and PSW during interrupt, and it seems like there are contradictions in the documents:

 

1. https://elearning.renesas.com/pluginfile.php/355/mod_folder/content/0/RX_Microcontrollers/RX_ICU.pdf?forcedownload=1

On p.6, it says

"...when the interrupt fires the CPU takes the interrupt and starts by saving the current processing context. These steps are automatically done by the CPU.
- First, the Program Counter and Program Status Word are pushed onto the stack.
- The stack pointer is switched from the User Stack Pointer to the Interrupt Stack Pointer by clearing
the U bit in the PSW."

It seems like implying PC and PSW are pushed onto User Stack, then stack pointer is switched to Interrupt Stack

 

2. https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf

On p.258, Figure 5.2, it shows:

for exception other than the fast interrupt

- PC->Preserved on the stack (ISP)

- PSW->Preserved on the stack (ISP)

- U=0 

 

So what is going on here?

 

 

  • At interrupt acceptance return address and status word are saved on the interrupt stack although the stack selection bit has not yet been changed. After this has been done stack selection bit is changed.
    As interrupt selection is a hardware controlled process it is possible to switch the used stack without modifying the stack selection bit.
    There is no contradiction.
  • In reply to FrankL:

    Thanks for explanation, I accept your explanation though I don't quite understand this:

    >>> As interrupt selection is a hardware controlled process it is possible to switch the used stack without modifying the stack selection bit.
    This is something new to me. How can it be possible? Special hardware circuitry which would 'ignore' the U-bit?
  • In reply to swoo.quek:

    swoo.quek,

    Has your question been answered?

    Mike Clements
    RenesasRulz Moderator