UPD78F1144 does not connect to the debugger CS+

I have a board with a controller UPD78F1144. The program connector was not output 9-pin.

I took out an  pin 9 (FLMD0) of the programming connector. I wrote a simple program. And nothing happened ... that's not a problem.

I writing the program with RFP. But the debugger CS+ 2019  cannot connect to the controller.

Option byte OCDENSET and OCDERSD   must be logical 1 - for Enables Chip debugging. In the future I will see how to write on SpecialFunctionRegister.

RFP settings are by default: RFP says:

========== (Connect) ==========
------ Start(Signature Read) ------
Device name: UPD78F1144
Device data: 10 7F 04 DC FD
Device end addr: 0001FFFF
Security Flag: 00FF
Boot Block Number: 001
FSW area: 0000 - 003F
Firmware Version: 3.40
Signature Read PASS
------ End(Signature Read) ------
========== (Disconnect) ==========
========== (Connect) ==========
------ Start(Get Flash options) ------
Get Flash options PASS
------ End(Get Flash options) ------
========== (Disconnect) ==========

 

Where to see which register is named "Security Flag"  Security Flag: 00FF - 2x8 or 16 bit register ??? ID is FFFFFFFFFFFFFFFFFFFF 

Where to allow in compiling the program to allow debugging.

Thanks

  • I don't know what you mean by "Security Flag". RFP allows to disable memory erase and program:

    This is activated using the "Set Security" command in RFP.

    If a device is locked using these settings it is not accessible any more.

    The debug ID code is stored in memory at the addresses following the option bytes. It is used to disable unauthorized debugger access. It can be erased by RFP, but only together with the complete memory contents.

    The device manual describes in the chapter about on-chip debug which processor resources are required by the debugger.

    www.renesas.com/.../U17854EJ9V0UD00.pdf

  • Hello

    Has Frank answered your questions?

    Kind regards,