I'm running into a strange issue with RF7A2A1AB where several peripheral registers do not read back the documented reset value after powering up the board from 'cold' state (no power applied for at least 10 seconds). This is causing the flash programming peripheral (R_FACI_LP) to have problems, as described below.
The steps I took to reproduce this are as follows:
At this point I can inspect some peripheral memory with GDB. For example, read MSTPCRB (0x40047000)
(gdb) p/x *0x40047000$1 = 0xffbff7ff
(gdb) p/x *0x40047000
$1 = 0xffbff7ff
This register is supposed to read 0xFFFFFFFF on reset. I'm sure there are several other registers which are incorrect as well.
I stumbled upon this while running a bootloader which runs entirely in RAM. After a warm reboot (power off less than a few seconds), the code would run fine. However, after a cold reboot, R_FACI_LP->FSTATR2 would show ILGLERR after the first write to R_FACI_LP->FCR (with the same exact code!). Resetting with R_FACI_LP->FRESETR did not clear the error. Only a power cycle would clear the error.
As a final note, my SVD file includes an (undocumented?) register R_FACI_LP->PFBER (0x407EFFC8). As I understand, RA2A1, does not actually have this register. However, after a 'cold boot', this register reads 0x80. After a 'warm boot', it reads 0x00. Maybe this will give some clue to the flash issue
I appreciate any insight or guesses! I've been stumped with this issue all day!
The execution of user code in boot mode is not a defined use case (the use case of boot mode is on entering boot mode, the device executes the built in boot mode firmware, and communicate over SCI9 or…