Question about renesas R32C/11

Hi guys,

I new user with family R32C/111. I have read R32C it is 32-bit CICS, but when I download and read it's datasheet, I have found out that it has only CPU 32bit registers but peripherals has only 8-bit control registers (SPI, UART, ADC..). For me it's weird because I worked with ARM 7, CORTEX-M0, 3,4.They are 32-bit MCU, so they have 32-bit core register and thus have 32-bit control register peripherals. Then Microchip PIC18 - 80bit MCU, that's 8-bit core and 8-bit peripherals , PIC32 that's 32-bit core and 32-bit peripherals 

My questions are:

What's new here? and why CISC 32-bit family RENESAS has this architecture?

Thank you.

      

Parents
  • The classification of a CPU is ONLY done on the saize of the CPU registers. §2-bit registers, 32-bit processor.

    The peripheral registers have nothing to do with this.

    ARM usually access data 32-bit aligned as this is the fastest access. So they use this also for peripheral registers. The registers themselves are often smaller.

    For R32C there is no speed advantage if a data is not aligned or if it is aligned to 16 or 32 bit as long as the data can be read in one cycle. This makes the memory map of R32C smaller than that of a comparable ARM processor. This is not so important for peripheral regsiters but may have an advantage for RAM variables as for variables the same alignment rules apply.

    When looking at Renesas processors it is the better choice to use RX instead of R32C.

  • Thank you for quickly respond.  Anymore, Can I use GCC compiler for H8S/2633 to compile family R32C, too? Because I use Linux, I dont want to change to Windows.

    I would like to ask you if you can recommend to me any tutorial about Renesas R32C?

  • Sorry, H8S and R32C are completely different CPU cores. The compiler cannot be used.

    I don't know any Linux tools for R32C or tutorial.

  • To my understanding GCC was never ported for use on the R32C series, because the chip was setup as an interim between the M16/M32c and the RX series chips.  The only method I know of to do R32C work under linux was to use a VM.  Depending on the need to use the R32C the M32C might be a viable option, as GCC does support that uC.

  • I agree that M32C is a close match to R32C, but if it is not mandatory to use R32C I think RX would be the better choice as it is the later design and has also GCC for Linux.

  • Footprint issues were what I was looking at.  The M32C should be a drop in replacement that should closely match, where moving to the RX will be a board re-spin to accommodate some of the different power pin requirements.

  • Thank you you all guys,

    I didn't decide the concept which MCU is used. HW was done, now I'm going to learn how works with this platform.

    Last two days I have read a lot off Renesas MCU(I have workded with H8S/2633 , but it was a long time ago). I can say, they are not impressive such as I have thought. They offer a lot off platforms, thus sometime makes chaos when you want choose MCU to develop.

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  • Thank you you all guys,

    I didn't decide the concept which MCU is used. HW was done, now I'm going to learn how works with this platform.

    Last two days I have read a lot off Renesas MCU(I have workded with H8S/2633 , but it was a long time ago). I can say, they are not impressive such as I have thought. They offer a lot off platforms, thus sometime makes chaos when you want choose MCU to develop.

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