I'm currently playing with the suspend 2 ram (s2r) functionality of the R-Car H3 Starterkit board (H3SK). I was wondering how it is supposed to work without any additional boards connected to the Com Express port. The Bl2 checks during boot if the BKUP_TRG (controlled by the PMIC) is set, if it reads "1" it skips the BL3(u-boot) and continuous from the previous state in RAM. Now the BKUP_TRG is only connected to the CPLD on the H3SK and I can't find any direct connection towards the SoC. Also, the BL2 tries to read the state of GP1_08 which is for sure not connected to the BKUP_TRG signal from the PMIC.
I tested s2r with a different pin (connected to one of the free dip switches), changed the state manually and it worked fine.
Am I missing something? According to some elinux.org pages, it should work. But to my understanding this can't be the case without software (BL2) and/or hardware modifications
BKUP_TRG is also connected to pin.64 of PMIC.See p.18 of R-Car H3 Starter Kit schematic. www.renesas.com/.../r-carh3starterkitschsn20201-2040025051-25550
Yes, this is the correct pin on the PMIC, but it needs to connected some how to the R-Car SoC. The bootloader checks if the PMIC pin is set and this only works if this pin is connected to some pin of the R-Car SoC
Please refer to the Starter Kit hardware manual.www.renesas.com/.../r-car-starterkit-hardware-manual
In "3.19 CPLD contents (4) Switch pins", there are following lines :
[Pin connections] :[Default set up](snip)BKUP_TRG(in)[H9] = ExA8(GP1_08)[A6] :ON
So, I think R-Car SoC is connected to BKUP_TRG via ExA8.
Well, that's interesting, neither does this section exist in the manual I used before, nor is the functionality working on my board. The board I use is a WS3.0, received this spring, therefore the CPLD FW should be up to date. I was able to get it working with a modification of BL2. I simply read the PMICs IRQ reg via I2C and check the state of the BKUP_TRG bit (and reset it, if needed). While this works, it might introduce some unnecessary overhead, since a state is read via I2C and nor via a simple locally connected GPIO.
Hi,It seems that BKUP_TRG is read via GPIO.So, I think there is no overhead by I2C in BL2 of Yocto BSP.And also, it doesn't need any modification of BL2 for S2R.
Yes in theory it should work, but it doesn't on my board and I simply don't know why. The pin check in L820 always evaluates to false. Therefore I added a second mechanism, which checks the PMIC state via I2C
I confirmed that S2R works correctly with my H3SK (S/N 25192) + Yocto v3.21.0.
I think that your board might be broken.If you have other board, please try it.And also, please tell us your environment(ex. board S/N, Yocto version, etc.) .
See also: elinux.org/.../How_to_run_the_"Suspend_to_RAM"