DK-S128 CAN FIFO ?

Is there an example of CAN bus for DK-S128 in FIFO mode?

In normal mode, I had no problem, i can send and receive messages.

I don't know how to configure the peripherals to work in FIFO mode.
CTLR-> MBM set FIFO mode, in MIKIVLR set bits 31:24 to 0, what to do next ?

Even though I am sending messages, I am not getting interrupted.

  • CAN slaves don't care how the master receives and queues up packets, but you will have to send enough packets to trigger the malibox interrupt - suggest you try PC Can adapter traffic generator, or use a RasPi - you can easily send lots of packets with both. Minimum mailbox depth is 4 I think - so send 5 to be sure.

    Are you using the Renesas SSP HAL driver -  it has the Mailboxes (aka NXP FIFOs) enabled and you can specify the depth.  If not, read the S1J User Manual, Chapter 29 very carefully. There are many registers to set and configuration options for CAN, CAN extended, FD, etc.

    Are you setting the MBER - Mailbox int enable register? User you debugger to look at them all.

    If you are trying to implement the driver directly for the CAN controller, I suggest first try to use the HAL driver, then use a debugger to snapshot ALL the CAN registers and see how they are configured, then set it up your manual way, and see what differences you see. That always works for me.

    Good luck,

    Larry

  • Interrupts are enabled in MIER_FIFO, instead of MIER. 

    MIER_FIFO.MB24 = 1  Enables interrupt for FIFO transmit.

    MIER_FIFO.MB25 = 0 generates interrupt every time transmission is completed.

  • I don't know the MB25 well - is it supposed to generate an interrupt at each packet transmit or when the xmit FIFO is drained?