I am trying to use the sample project given with r11an0065eu0101-synergy-can-hal-mod-guide. Project name CAN_HAL_MG_AP. This project was made for S7 synergy kit and coded with SSP version 1.2. But this version is not supported by Renesas, so I am using recent version SSP 1.7.5 in my S124 DK kit. Then during importing the project some settings were changed.
When I debug this project, ı am getting stuff error and bit recessive error.
Because there is no PLL on S124 DK board, I used CAN clock source CANMCLK is sourced from XTAL. So I cannot use a clock more than 12Mhz clock for CAN module. Because of restrictions:
PCLKB <= CANMCLK(XTAL)
ICLK / PCLKB = 2
USB clock = 48 MHZ -> HOCO = 48 Mhz
No PLL -> ICLK is sourced from HOCO
ICLK <= 32 Mhz -> it is selected as 24 Mhz -> PCLKB is selected as 12 Mhz -> XTAL selected as 12 Mhz
But in project default settings XTAL used with 24 Mhz. I cannot use this value because of the clock restrictions above. Is this my problem, or is it a different problem?
Note: I measured voltages on the synergy kit for CANH as 2V - 4V, and CANL as 0.5V - 2V.
I am using Microchip can analyzer to analyze. When it is connected there is no ACK error, when I disconnect it there is ACK error. The voltages of the analyzer for CANL 1.4V - 2.3V and CANH 2V-3.5V. Is it the cause of my recessive error?
Is there anyone working on CAN with S124 DK?
Have you checked the Synergy forum? There could be a thread there that might help you configure your DK-S124 CAN.
JBRenesasRulz Forum Moderator