adc unit gain amplifier Purpose

Hi,

I need to use some channels of unit 0,some of unit 1,Is it good to include stack for both (unit 0,unit1) inside single adc thread ?In the synegy configuration ,for adc thred there is 'group B' option ,what is the application purpose of Group B.

I have read SSP user manual 1.7.5,didnot found application use of the same.

Purpose of gainamplifier settings for first 3 channels ?

 

 

  • Hello,

    There is no issue in having 2 instances of ADC in one thread.

    The ADC unit on Synergy supports Group Scan Mode. Please refer the the Hardware User's Manual of you Synergy device for more information. But in summary, The ADC channels can be split into 2 groups, the default group A and group B. For example, AN001 AN002, AN008 can be in Group A (the default group) and AN003, AN009, AN011 etc, can can Group B.
    Via the ELC trigger, the 2 groups can be scanned at different times.

    The gain amplifier is exactly as it suggests, an amplifier of the single being input. The gain is quite limited, but it may be beneficial in some applications to make measuring the applied signal easier.

    Regards,
    Richard
  • In reply to Richard:

    Thanks Richard for suggesting me to refer hardware manual.
    In regards to gain,various options available for PGA,on what basis this is selcected.(I meant which choice to opt for. )
  • In reply to Alex:

    The gain value that you set  is dependent on the input signal and operation mode.  

    Do you intend on using single ended or differential mode?

    The input ranges for each mode are stated in the electrical characteristics of the PGA in the Hardware User's Manual.

     

    For example, for the S7G2:

    Regards,

    Richard

  • In reply to Richard:

    Hi,

    In pasted screenshot, AIN0 => is it for channel 0 only ?

    ADC input are single ended ,maximum input to adc channel is 1000 mV.BAsed on this which gain should be selected ?
  • In reply to Alex:

    Hello,

    The screen shots are applicable to all PGA (AN000, AN001, AN002, AN100, AN101, AN102)

    As you are applying a maximum input voltage of 1V, and assuming that your VREFH0 = AVCC0 = 3.3V, then a gain of 3.077 would potentially be suitable.

    As the ADC is 12-bit, a full scale voltage will result in a AN result of 4095.

    In a test I performed, I applied 1A to AN003, AN002, AN001 and AN000.

     

    AN000 has no gain and is the standard conversion result

    AN000 has a PGA gain of 2

    AN001 has a PGA gain of 2.5

    AN002 has a PGA gain of 3.07

     

    I perform the conversion and read the ADC results of each channel

    Full scale input voltage = 3.3V

    3.3V / 4069 = 805.664uV / bit

    Therefore, the results indicate that the PGA is amplifying the signal before being applied the ADC

    1287 x 805.664u = 1.03V  == input value

    2479 x 805.664u = 1.99V    == input x 2

    3089 x 805.664u = 2.48V  == input x 2.5

    3806 x 805.664u = 3.06V  == input x 3.07

     

    Hope this helps

    Richard

  • Hello Alex,

    Has Richard helped you to find the answer on your question?

    Kind regards,
  • In reply to Sergey Sokol:

    Hi Sergey SOkol,

    yes ,it helped me to understand PGA and group B purpose,i marked it as it helped me.Thanks Richard for well presented response .

    Cheers