Hello,
I'm a student who has been assigned a project to design a custom System on Module. We selected a RZ/A1 processor to build our design around, and my job is to figure out how to load a Linux Kernel onto our custom system. I've been trying to learn how to program a kernel onto QSPI Flash using the High Resolution Embedded GUI Solution Kit (YLCDRZA1H). I've been using this incomplete guide and the html file included with the rza_linux-4.9_bsp I downloaded from github. However, the instructions I can find on the subject are a bit opaque, and my attempts to program have been met with error messages that I don't know how to resolve, and can't find any solutions with google.
I've been doing my programming on a Linux Ubuntu virtual machine. At one point it seemed like the jlink worked, but since then all I get is the error below.
It seems that once I have everything built, I should load the u-boot onto the flash and then run that. However, I can't seem to get the u-boot to program, and I'm not sure how to start the u-boot once I've done that.
From what I can tell, I've built the packages from the bsp correctly, but the jlink command fails. I get a similar command when I try to load the file directly into the location listed on the config file. Here's the command I used and the output I got from the terminal:
rza_linux-4.9_bsp$ ./build.sh jlink u-boot/home/james/BSPs/rza_linux-4.9_bspBuild Environment set-------------------------------------------------------Download binary files to on-board RAM or SPI Flash-------------------------------------------------------'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin'SEGGER J-Link Commander V6.54c (Compiled Nov 7 2019 17:05:53)DLL version V6.54c, compiled Nov 7 2019 17:05:41J-Link Command File read successfully.Processing script file...J-Link connection not established yet but required for command.Connecting to J-Link via USB...O.K.Firmware: J-Link ARM-OB SAM7 compiled Jun 1 2012 09:33:42Hardware version: V2.10S/N: 302130433VTref=3.300VTarget connection not established yet but required for command.Device "R7S721001" selected.Connecting to target via JTAGTotalIRLen = 4, IRPrint = 0x01JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DPAP map detection skipped. Manually configured AP map found.AP[0]: AHB-AP (IDR: Not set)AP[1]: APB-AP (IDR: Not set)Using preconfigured AP[1] as APB-APAP[1]: APB-AP foundROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTIROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTIROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTIROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ???ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM TableROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMCROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTIROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIUROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTFROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9Found Cortex-A9 r3p06 code breakpoints, 4 data breakpointsDebug architecture ARMv7.0Data endian: littleMain ID register: 0x413FC090I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-WayD-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-WaySystem control register: Instruction endian: little Level-1 instruction cache enabled Level-1 data cache enabled MMU enabled Branch prediction enabledMemory zones: [0]: Default (Default access mode) [1]: AHB-AP (AP0) (DMA like acc. in AP0 addr. space) [2]: APB-AP (AP1) (DMA like acc. in AP1 addr. space)Cortex-A9 identified.Halting CPU for downloading file.Downloading file [/tmp/u-boot.bin]...****** Error: Timeout while checking target RAM, core does not stop. (PC = 0x181F3668, CPSR = 0x2000009B, LR = 0x00000004)!Failed to prepare for programming.Failed to execute RAMCode for RAM check!Error while determining flash info (Bank @ 0x18000000)Unspecified error -1Script processing completed.============== ****** Error: Timeout while checking target RAM, core does not stop. (PC = 0x181F3668, CPSR = 0x2000009B, LR = 0x00000004)! ==============
I'm a beginner at this (and running behind on my project besides) so any help is appreciated.
Hi Jagerton,
Are you still having this error? Or you have already fixed this one?
JBRenesasRulz Forum Moderator
https://renesasrulz.com/https://academy.renesas.com/https://en-us.knowledgebase.renesas.com/
In reply to JB:
In reply to Jagerton:
In reply to Chris:
I tried to use the prepare command and it says that this command doesn't exist. Is there a file I could be missing, or maybe something I need to add to the PATH? Here's the output from that: rza_linux-4.9_bsp$ ./build.sh jlink prepare /home/james/BSPs/rza_linux-4.9_bsp Build Environment set ------------------------------------------------------- Download binary files to on-board RAM or SPI Flash ------------------------------------------------------- ERROR: File does not exist. prepare Then I tried just holding down the reset button, but it started scrolling again before I let the reset go. It gave me two different errors on those tries: james@james-VirtualBox:~/BSPs/rza_linux-4.9_bsp$ ./build.sh jlink u-boot /home/james/BSPs/rza_linux-4.9_bsp Build Environment set ------------------------------------------------------- Download binary files to on-board RAM or SPI Flash ------------------------------------------------------- 'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin' SEGGER J-Link Commander V6.54c (Compiled Nov 7 2019 17:05:53) DLL version V6.54c, compiled Nov 7 2019 17:05:41 J-Link Command File read successfully. Processing script file... J-Link connection not established yet but required for command. Connecting to J-Link via USB...O.K. Firmware: J-Link ARM-OB SAM7 compiled Jun 1 2012 09:33:42 Hardware version: V2.10 S/N: 302130433 VTref=3.300V Target connection not established yet but required for command. Device "R7S721001" selected. Connecting to target via JTAG TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ??? ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM Table ROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMC ROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIU ROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTF ROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9 Found Cortex-A9 r3p0 6 code breakpoints, 4 data breakpoints Debug architecture ARMv7.0 Data endian: little Main ID register: 0x413FC090 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way System control register: Instruction endian: little Level-1 instruction cache enabled Level-1 data cache enabled MMU enabled Branch prediction enabled Memory zones: [0]: Default (Default access mode) [1]: AHB-AP (AP0) (DMA like acc. in AP0 addr. space) [2]: APB-AP (AP1) (DMA like acc. in AP1 addr. space) Cortex-A9 identified. Halting CPU for downloading file. Downloading file [/tmp/u-boot.bin]... ****** Error: Timeout while checking target RAM, core does not stop. (PC = 0x181F3668, CPSR = 0x2000009B, LR = 0x00000004)! Failed to prepare for programming. Failed to execute RAMCode for RAM check! Error while determining flash info (Bank @ 0x18000000) Unspecified error -1 Script processing completed. ============== ****** Error: Timeout while checking target RAM, core does not stop. (PC = 0x181F3668, CPSR = 0x2000009B, LR = 0x00000004)! ============== james@james-VirtualBox:~/BSPs/rza_linux-4.9_bsp$ ./build.sh jlink u-boot /home/james/BSPs/rza_linux-4.9_bsp Build Environment set ------------------------------------------------------- Download binary files to on-board RAM or SPI Flash ------------------------------------------------------- 'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin' SEGGER J-Link Commander V6.54c (Compiled Nov 7 2019 17:05:53) DLL version V6.54c, compiled Nov 7 2019 17:05:41 J-Link Command File read successfully. Processing script file... J-Link connection not established yet but required for command. Connecting to J-Link via USB...O.K. Firmware: J-Link ARM-OB SAM7 compiled Jun 1 2012 09:33:42 Hardware version: V2.10 S/N: 302130433 VTref=3.300V Target connection not established yet but required for command. Device "R7S721001" selected. Connecting to target via JTAG TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ??? ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM Table ROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMC ROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIU ROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTF ROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9 Found Cortex-A9 r3p0 6 code breakpoints, 4 data breakpoints Debug architecture ARMv7.0 TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP ****** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers. TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP Cannot connect to target. Target connection not established yet but required for command. Device "R7S721001" selected. Connecting to target via JTAG TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ??? ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM Table ROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMC ROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIU ROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTF ROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9 Found Cortex-A9 r3p0 6 code breakpoints, 4 data breakpoints Debug architecture ARMv7.0 TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP ****** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers. TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP Cannot connect to target. Script processing completed. ============== ****** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers. ============== I also tried holding the reset button and running the program command for u-boot and then release the button once the scrolling stopped. Here's the output for that: rza_linux-4.9_bsp$ ./build.sh jlink u-boot /home/james/BSPs/rza_linux-4.9_bsp Build Environment set ------------------------------------------------------- Download binary files to on-board RAM or SPI Flash ------------------------------------------------------- 'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin' SEGGER J-Link Commander V6.54c (Compiled Nov 7 2019 17:05:53) DLL version V6.54c, compiled Nov 7 2019 17:05:41 J-Link Command File read successfully. Processing script file... J-Link connection not established yet but required for command. Connecting to J-Link via USB...O.K. Firmware: J-Link ARM-OB SAM7 compiled Jun 1 2012 09:33:42 Hardware version: V2.10 S/N: 302130433 VTref=3.300V Target connection not established yet but required for command. Device "R7S721001" selected. Connecting to target via JTAG TotalIRLen = 4, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ??? ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM Table ROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMC ROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTI ROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIU ROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTF ROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9 Found Cortex-A9 r3p0 6 code breakpoints, 4 data breakpoints Debug architecture ARMv7.0 ****** Error: Communication timed out: Requested 9 bytes, received 0 bytes ! Could not transfer JTAG data. Cortex-A/R (connect): Core internal signal DBGEN is not asserted. Debugging is not possible. Cannot connect to target. Target connection not established yet but required for command. Device "R7S721001" selected. Connecting to target via JTAG Cannot connect to target. Script processing completed. ============== ****** Error: Communication timed out: Requested 9 bytes, received 0 bytes ! ============== When I tried switching the bootmode to eMMC the JLink stopped working entirely, and now I get the same error even if I boot from SFLASH: james@james-VirtualBox:~/BSPs/rza_linux-4.9_bsp$ ./build.sh jlink u-boot /home/james/BSPs/rza_linux-4.9_bsp Build Environment set ------------------------------------------------------- Download binary files to on-board RAM or SPI Flash ------------------------------------------------------- 'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin' SEGGER J-Link Commander V6.54c (Compiled Nov 7 2019 17:05:53) DLL version V6.54c, compiled Nov 7 2019 17:05:41 J-Link Command File read successfully. Processing script file... J-Link connection not established yet but required for command. Connecting to J-Link via USB...FAILED: Cannot connect to J-Link. J-Link connection not established yet but required for command. Connecting to J-Link via USB...FAILED: Failed to open DLL Script processing completed. ============== Connecting to J-Link via USB...FAILED: Cannot connect to J-Link. ============== tl:dr => Tried running prepare command, says it doesn't exist. Am I missing a file? Also tried using reset button to no avail. Changing boot mode has somehow made it impossible to connect to the JLink.