I was trying to use the ISL94202 eval board to measure some cycling on a battery pack. We wanted to double check that the temperature of the FETs stays reasonable during some of our higher current operations, and so I placed the Jumper into FET mode, and checked the "xT2 Monitors Fet Temp" option in the gui.
The first few tests went fine, but once the xT2 got above the Over-Temp Discharge Threshold, the board would cutoff and go into over temp, despite the fact that the FET temp was the only thing going over the temp threshold. The xT1, which was monitoring cell temperature, was 20 degC cooler.
I double checked the setting by reading and writing the settings multiple times, and even did a full RAM and EEPROOM write/read a few times. I verified that the bit in the ram copy was set as expected based on the DS, but the behavior was still the same: the ISL was still interpreting xT2 as a cell temperature, and tripping the threshold.
Is this a known issue? is there anything I can do to improve this?
I've checked the knowledge base but it seems that this is not a common issue. I would suggest submitting a ticket to Renesas Technical Support as they could help you investigate about this issue.
JBRenesasRulz Forum Moderator
Here is a response from the factory apps engineer for the chip.
The bit function is operating correctly. He assumed the bit blocked the Power FETs from being turned off, but it does not do that. This bit only prevents the turn off the cell balance transistors.
If he wants to allow the power FET to operate over a different temp range than the cells then he has to modify the resistor divider network for the FET thermistor so the voltage fits the range of the cell thermistor.